Oversampling and Decimation: When Extra Samples Add Bits

The firmware averages 256 readings from a 12-bit ADC and reports 16-bit results. On one board the extra bits are real: the readings settle to fractions of a count. On another board, with a quieter front end, the 16-bit output steps in jumps of exactly 16, as if nothing had happened. Same code, same converter. Oversampling and decimation only add resolution when the conditions for it are met, and the most important condition is the one that sounds wrong: there has to be enough noise. This article explains where the “four samples per bit” rule comes from, when it works, what the decimation filter does to your signal, and what no amount of averaging can repair.

Key Takeaways

• Averaging four times as many samples halves white noise and adds about one bit (6 dB). Sixteen bits from a 12-bit converter takes 256×.
• It needs noise. If the input sits between two codes with less than about one LSB of random noise, every sample reads the same code and averaging adds nothing.
• Oversampling improves resolution, not accuracy: offset, gain and integral nonlinearity pass straight through the average.
• A plain average is a filter with nulls. Averaging for exactly one mains cycle (1/60 s, or 1/50 s) rejects the hum and its harmonics.
• Cascaded integrator-comb (CIC) filters decimate with only adders and registers, but their registers grow by N·log₂(R) bits.

“I averaged 256 samples and got nothing”

The complaint shows up wherever people try to squeeze more resolution out of a microcontroller ADC, and the cause is nearly always one of four things.

The input is too quiet. A clean reference, a slow sensor and a well-filtered front end can leave the converter reading the same code every time. Averaging identical numbers returns the same number.

The noise isn’t random. Interference from a switching regulator or a clock is correlated with itself; averaging it doesn’t shrink it by the square root of the sample count.

The problem was accuracy, not resolution. A converter whose INL is three LSB is still wrong by three LSB after averaging, just with more digits.

The arithmetic truncated. Summing 256 twelve-bit values needs a 20-bit accumulator; a 16-bit variable overflows silently.

How oversampling and decimation work

Quantization noise and the rule of four

An ideal N-bit converter divides its range into steps of size q. Bernard Widrow and colleagues, in their review of the statistical theory of quantization in IEEE Transactions on Instrumentation and Measurement, describe when the error from that rounding behaves like additive noise that is uniformly distributed, with a power of q²/12, and uncorrelated with the signal. When it does, quantization error is just one more noise source, spread across the band from DC to half the sample rate.

If you sample faster than the signal needs, that fixed noise power is spread over a wider band, and a digital low-pass filter can remove the part outside your signal bandwidth. Walt Kester’s Analog Devices tutorial MT-001 calls the improvement processing gain: 10 log₁₀(f_s / 2·BW) decibels. Each doubling of the sample rate gives about 3 dB, or half a bit. A factor of four gives 6 dB, or one bit. Silicon Labs’ application note AN118 turns that into the familiar rule: to gain w bits, oversample by 4^w. Going from 12 to 16 bits takes 4⁴ = 256 samples per output, so a converter running at 100 kS/s delivers about 390 sixteen-bit results per second.

A worked example of processing gain: a converter sampling at 1 MS/s, with a signal of interest below 1 kHz, has a processing gain of 10 log₁₀(1,000,000 / 2,000) ≈ 27 dB, about 4.5 bits, if the filter rejects everything above 1 kHz and the noise is white.

Why it needs noise

The noise model only holds when the input moves across several codes. AN118 lists the conditions plainly: the noise must be approximately white, large enough (about one LSB) to make the code change randomly between samples, and the input must be equally likely to fall anywhere between two adjacent codes. When that isn’t true, quantization error is a fixed offset that depends on where the input sits, and averaging can’t remove it.

A short illustrative simulation makes the difference visible. Take an input sitting 0.3 LSB above a code. With no noise, every sample reads that code, and the average of 256 samples has an error of 0.3 LSB. Add Gaussian noise of 0.5 LSB RMS before quantization, and the average of 256 samples comes out at 0.30 LSB with a spread of about ±0.036 LSB from one average to the next. The noise made the extra resolution possible.

When the natural noise is too small, designers add it on purpose: dither. AN118 notes that some applications inject noise into the signal deliberately for this reason. Kester’s tutorial MT-004 on ADC input noise makes the broader point that a converter which always shows the same code isn’t necessarily better; it may just be hiding information that a little noise would reveal.

What averaging can’t fix

Averaging reduces random error. It does nothing to errors that repeat the same way every sample: offset, gain error and integral nonlinearity. AN118 states directly that oversampling doesn’t correct INL. The IEEE standard for ADC terminology and test methods (IEEE Std 1241) treats these static errors separately from noise for the same reason. If your problem is that the reading is wrong, not that it’s jumpy, oversampling will give you a more precise wrong number.

The decimation filter shapes the result

Decimation is two steps: filter, then keep one sample in R. The filter is the part that matters, because anything it doesn’t remove above the new Nyquist frequency aliases into the output.

The simplest decimation filter is a block average of R samples, also called a boxcar or sinc filter. Its frequency response has nulls at multiples of f_s / R. That can be used deliberately: average exactly 100 samples taken at 6 kS/s and the window is 1/60 s, which puts nulls at 60 Hz and every harmonic of it. In a plant where the mains is 60 Hz, that’s an effective hum filter at no extra cost. The weakness of the boxcar is its slow roll-off between nulls, so it’s a modest anti-alias filter on its own.

For higher decimation ratios, Eugene Hogenauer’s 1981 paper in IEEE Transactions on Acoustics, Speech, and Signal Processing introduced the cascaded integrator-comb (CIC) filter: N integrators at the high rate, a rate change by R, and N comb sections at the low rate, with no multipliers at all. It’s equivalent to N cascaded boxcar averages, so its nulls fall in the same places and its rejection between them is much better. The cost is register growth. Hogenauer showed that the registers need N·log₂(R·M) extra bits, where M is the differential delay; three stages decimating by 64 with M = 1 need 18 extra bits. CIC filters also droop across the passband, which is why they’re usually followed by a short compensating FIR filter at the lower rate.

Delta-sigma converters take the idea further

A delta-sigma ADC is oversampling taken to its conclusion: a very coarse quantizer running at a very high rate, a feedback loop that pushes quantization noise up in frequency (noise shaping) and a digital decimation filter, often a CIC followed by FIR stages, that removes it. The result is far more than the half-bit per doubling of plain oversampling, which is why precision sensor converters are mostly delta-sigma.

Oversampling and decimation methods compared

Method	What it improves	Requires	Hardware cost	Watch out for
Simple averaging (boxcar)	White noise, resolution	~1 LSB of random noise	Accumulator only	Weak anti-aliasing between nulls
Averaging over one mains cycle	Hum at 50/60 Hz and harmonics	Sample count matched to the mains period	Accumulator, timing	Mains frequency drift
Added dither	Makes averaging work on a quiet input	Controlled noise source	Small	Adds noise if not averaged out
CIC decimator	High-ratio decimation, good null rejection	Integer decimation ratio	Adders and registers only	Register growth, passband droop
CIC + compensating FIR	Flat passband, sharp cutoff	Second stage at low rate	Multipliers at low rate	Latency
Delta-sigma ADC	Resolution via noise shaping	Built into the converter	Inside the chip	Latency, settling after channel switching

What to actually do

Check the histogram before you average

Capture a few thousand samples of a steady input and plot the code histogram. If it spans several codes and looks roughly Gaussian, oversampling will work. If it’s a single bar, you need dither or a different approach.

Size the ratio from the bits you need

Use 4^w for w extra bits, and check that the resulting output rate still covers your signal bandwidth.

Size the accumulator

The sum of R samples of N bits needs N + log₂(R) bits. For a CIC, use Hogenauer’s N·log₂(R·M) growth.

Pick the window to reject what you know is there

If mains hum is the main interference, make the averaging window an integer number of mains cycles for your country’s grid frequency.

Measure accuracy separately

Compare the averaged result with a reference at several points across the range. If it’s consistently off, the problem is offset, gain or INL, and the fix is calibration, not more samples.

What not to do

Don’t report the bit count of the averaged result as the converter’s accuracy. And don’t oversample a signal whose noise is dominated by a single interference tone; filter or remove the tone first.

How to put it to work

If you have an hour

Record 4,096 samples of a stable input with your current setup, plot the histogram and compute the standard deviation in LSB. That one number tells you whether oversampling can help.

If you have a sprint

Implement the averaging with a correctly sized accumulator, sweep the ratio from 1 to 1,024 and plot noise against ratio on log axes. The slope should be −½ (noise halving for every 4×); where it flattens, something other than white noise has taken over.

If you want it to last the product’s lifetime

Document the oversampling ratio, the filter type and the noise assumption with the firmware, and add a production test that checks the input noise histogram. A quieter component revision can silently break the extra resolution.

The question to ask yourself: “Is my problem resolution or accuracy, and have I checked that there’s enough random noise for averaging to help?”

Frequently asked questions

What is oversampling and decimation?

Oversampling means sampling much faster than the signal requires. Decimation means low-pass filtering the fast samples and keeping one in every R, which produces a slower, higher-resolution output. Together they trade sample rate for lower noise and finer resolution.

How many samples do I need for one extra bit?

Four times as many, if the noise is white and at least about one LSB. Each doubling of the sample rate gives about 3 dB, so 4× gives 6 dB, one bit. Going from 12 to 16 bits takes 256 samples per output.

Why doesn’t averaging increase my ADC resolution?

Usually because the input is too quiet: every sample reads the same code, so the average is the same code. Averaging also doesn’t help with correlated interference or with static errors such as offset and nonlinearity. Adding a small amount of dither can make it work.

What is a CIC filter?

A cascaded integrator-comb filter, introduced by Hogenauer in 1981, decimates or interpolates using only adders and registers. It behaves like several cascaded moving averages, with nulls at multiples of the output rate, and is commonly followed by a short FIR filter to flatten its passband.

Does oversampling improve ADC accuracy?

No. It improves resolution and reduces random noise, but offset, gain error and integral nonlinearity are the same in every sample and pass through the average unchanged. Those are fixed by calibration.

Related reading: ADC resolution vs accuracy, sampling, aliasing and filtering and sensor noise sources explained.

Sources

1. Widrow, B., Kollár, I., & Liu, M.-C. (1996). “Statistical Theory of Quantization.” IEEE Transactions on Instrumentation and Measurement, 45(2), 353–361. https://doi.org/10.1109/19.492748
2. Hogenauer, E. B. (1981). “An Economical Class of Digital Filters for Decimation and Interpolation.” IEEE Transactions on Acoustics, Speech, and Signal Processing, 29(2), 155–162. https://doi.org/10.1109/TASSP.1981.1163535
3. IEEE (2023). IEEE Standard for Terminology and Test Methods for Analog-to-Digital Converters (IEEE Std 1241-2023). https://standards.ieee.org/ieee/1241/6797
4. Silicon Laboratories (2013). “Improving ADC Resolution by Oversampling and Averaging.” Application Note AN118, Rev. 1.3. https://silabs.com/documents/public/application-notes/an118.pdf
5. Kester, W. (2008). “Taking the Mystery out of the Infamous Formula, ‘SNR = 6.02N + 1.76dB,’ and Why You Should Care.” Analog Devices Tutorial MT-001, Rev. A. https://www.analog.com/media/en/training-seminars/tutorials/MT-001.pdf
6. Kester, W. (2008). “The Good, the Bad, and the Ugly Aspects of ADC Input Noise: Is No Noise Good Noise?” Analog Devices Tutorial MT-004, Rev. A. https://www.analog.com/media/en/training-seminars/tutorials/MT-004.pdf